Public learning track
Flash Analogue-to-Digital Converters and Priority Encoders
11th Grade · Technology · UK A-Level
7 lessons
Goal
Design, analyse, and evaluate parallel flash ADC circuits, comparator reference ladders, and combinational priority encoder logic networks.
Featured Diagrams
Comparator Reference Voltage Ladders for Flash Conversion
7 lessons
0 of 7 done
- 1Comparator Reference Voltage Ladders for Flash ConversionUp nextStart
- 2Analysing Flash Converter Quantisation Thresholds and ResolutionPremiumNot started yet
- 3Truth Tables and Logic Equations for 4-to-2 Priority EncodersNot started yet
- 4Designing 8-to-3 Priority Encoders with Active-High LogicNot started yet
- 5Active-Low Priority Encoders and Enable-Input CascadingNot started yet
- 6Complete Design Synthesis of a 3-Bit Flash ADCNot started yet
- 7Flash ADC Propagation Delay, Conversion Speed, and Component CountNot started yet
Standards Covered
- ELEC-12.3General Certificate of Education Advanced Level (UK A-Level) · Electronics · Year 13 (A2 Level) · Grade 11the use of an analogue-to-digital (ADC) converter for converting analogue into digital signals and the analysis and design of a flash converter ADC based on comparators to meet a specification
- ELEC-12.4General Certificate of Education Advanced Level (UK A-Level) · Electronics · Year 13 (A2 Level) · Grade 11the analysis and design of a priority encoder to meet a specification
Curriculum Framework
11th Grade · Technology · UK A-Level
1
8 lessons
Signal Conversion Principles and Digital-to-Analogue Conversion
Explain the necessity of converting between analogue and digital domains and design op-amp summing and ladder-based digital-to-analogue converters to technical specifications.
2
7 lessons
Flash Analogue-to-Digital Converters and Priority Encoders
Design, analyse, and evaluate parallel flash ADC circuits, comparator reference ladders, and combinational priority encoder logic networks.
3
5 lessons
Digital Ramp, Sequential ADCs, and Sample-and-Hold Circuits
Analyse digital ramp, tracking, and SAR converter architectures, calculate conversion timing, and evaluate front-end sample-and-hold circuits.