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Imagine designing a temperature sensor using a voltage divider that outputs an exact 5.00Β V5.00\text{ V} signal. The moment you connect it to an analog meter or ADC with low resistance, that signal collapses down to less than 1Β V1\text{ V}.
This signal collapse happens because of loading error, where the measuring device draws current and unintentionally alters the sensor circuit itself.
Before we solve this collapse, let us look at the mathematics behind why connecting a load distorts an otherwise balanced sensor.

The Mechanism of Signal Loading

In an unloaded potential divider with supply voltage VsV_s and resistors R1R_1 and R2R_2, no current leaves the midpoint. The output voltage is governed by the standard ratio Vunloaded=Vsβ‹…R2R1+R2V_{\text{unloaded}} = V_s \cdot \frac{R_2}{R_1 + R_2}
When you attach a load resistance (RLR_L) directly to the output, RLR_L is placed in parallel with R2R_2. This drops the effective bottom resistance to Req=R2βˆ₯RL=R2β‹…RLR2+RLR_{\text{eq}} = R_2 \parallel R_L = \frac{R_2 \cdot R_L}{R_2 + R_L}
Let us calculate a concrete scenario: assume Vs=10Β VV_s = 10\text{ V}, high-value sensor resistors R1=100Β kΞ©R_1 = 100\text{ k}\Omega and R2=100Β kΞ©R_2 = 100\text{ k}\Omega, and a low load resistance RL=10Β kΞ©R_L = 10\text{ k}\Omega.
First, the parallel combination gives Req=100Β kΩ×10Β kΞ©100Β kΞ©+10Β kΞ©=9.09Β kΞ©R_{\text{eq}} = \frac{100\text{ k}\Omega \times 10\text{ k}\Omega}{100\text{ k}\Omega + 10\text{ k}\Omega} = 9.09\text{ k}\Omega. Substituting this back into the voltage divider yields Vloaded=10Β Vβ‹…9.09Β kΞ©100Β kΞ©+9.09Β kΞ©=0.833Β VV_{\text{loaded}} = 10\text{ V} \cdot \frac{9.09\text{ k}\Omega}{100\text{ k}\Omega + 9.09\text{ k}\Omega} = 0.833\text{ V}
The load causes an 83.3%83.3\% voltage drop because the sensor cannot supply enough current without dropping voltage across R1R_1. How can we transfer the full 5.00Β V5.00\text{ V} signal into RLR_L without pulling any current from the divider?

Eliminating Loading with a Voltage Follower

An ideal operational amplifier has infinite input impedance (Rinβ†’βˆžR_{\text{in}} \to \infty) and zero output impedance (Routβ‰ˆ0R_{\text{out}} \approx 0). In a unity-gain buffer configuration, the output connects directly back to the inverting input (Vβˆ’V_-).